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vishay siliconix si9136 document number: 70818 s11-0975-rev. d, 16-may-11 www.vishay.com 1 not recommended for new de signs, please refer to si9138 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 multi-output power-supply controller features ? up to 95 % efficiency ? 3 % total regulation (each controller) ? 5.5 v to 30 v input voltage range ? 3.3 v, 5 v, and 12 v outputs ? 200 khz low-noise fixed frequency operation ? precision 3.3 v reference output ? 30 ma linear regulator output ? high efficiency pulse skipping mode operation at light load ? only three inductors required - no transformer ? little foot ? optimized output drivers ? internal soft-start ? minimal external control components ? 28-pin ssop package description the si9136 is a current-mode pwm and psm converter controller, with two synchronous buck converters (3.3 v and 5 v) and a flyback (non-isolated buck-boost) converter (12 v). designed for portable devices, it offers a total five power outputs (three tightly regulated dc/dc converter outputs, a precision 3.3 v refe rence and a 5 v ldo output). it requires minimum external components and is capable of achieving conversion efficiencies approaching 95 %. the si9136 is available in a 28-pin ssop package and specified to operate over the extended commercial (0 c to 90 c) temperature range. functional block diagram 5 v linear regulator 3.3 v voltage reference 3.3 v smps 5 v smps 12 v smps power-up control v in + 3.3 v v l (5.0 v) control inputs v ref (+ 3.3 v) + 5 v + 12 v
www.vishay.com 2 document number: 70818 s11-0975-rev. d, 16-may-11 vishay siliconix si9136 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes: a. device mounted with all leads soldered or welded to pc board. b. derate 9.25 mw/c above 90 c. stresses beyond those listed under ?absolute maximum ratings? ma y cause permanent damage to the device. these are stress rating s only, and functional operation of the device at these or any other condit ions beyond those indicated in the operational sections of the specifications is not implied. exposure to absolute maximum rating conditions for extended periods may affect device reliability. absolute maximum ratings parameter limit unit v in to gnd - 0.3 to + 36 v v p gnd to gnd 2 v l to gnd - 0.3 to + 6.5 v bst 3 , bst 5 , bstfy to gnd - 0.3 v to + 36 v v l short to gnd continuous lx 3 to bst 3 ; lx 5 to bst 5 ; lxfy to bst - 6.5 v to 0.3 v v inputs/outputs to gnd (cs 3 , cs 5 , csp, csn) - 0.3 v to (v l + 0.3 v) 5 on/off , 3 on/off , 12 on/off - 0.3 v to + 5.5 v dl3, dl5 to pgnd - 0.3 v to (v l + 0.3 v) dlfy to pgnd input of flyback dh3 to lx 3 , dh5 to lx 5 , dhfy to lxfy - 0.3 v to (bstx + 0.3 v) v continuous power dissipation (t a = 90 c) a 28-pin ssop b 572 mw operating temperature range 0 c to 90 c c storage temperature range - 40 c to 125 c lead temperature (soldering, 10 sec.) 300 specifications parameter specific test conditions v in = 15 v , i vl = i ref = 0 ma t a = 0 c to 90 c, all converters on limits unit min. a typ. b max. a 3.3 v buck controller total regulation (line, load, and temperature) v in = 6 to 30 v, 0 < v cs3 - v fb3 < 90 mv 3.23 3.33 3.43 v line regulation v in = 6 to 30 v 0.5 % load regulation 0 < v cs3 - v fb3 < 90 mv 0.5 current limit v cs3 - v fb3 90 125 160 mv bandwidth l = 10 h, c = 330 f 50 khz phase margin r sense = 20 m ? 65 5 v buck controller total regulation (line, load, and temperature) v in = 6 to 30 v, 0 < v cs5 - v fb5 < 90 mv 4.88 5.03 5.18 v line regulation v in = 6 to 30 v 0.5 % load regulation 0 < v cs5 - v fb5 < 90 mv 0.5 current limit v cs5 - v fb5 90 125 160 mv bandwidth l = 10 h, c = 330 f 50 khz phase margin r sense = 20 m ? 65 12 v flyback controller total regulation (line, load, and temperature) v in = 6 to 30 v, 0 < v csp - v csn < 300 mv 11.4 12.0 12.6 v line regulation v in = 6 to 30 v 0.5 % load regulation 0 < v csp - v fbn < 300 mv 0.5 current limit v csp - v csn 330 410 500 mv bandwidth l = 10 h, c = 100 f 10 khz phase margin r sense = 100 m ? , c comp = 120 pf 65 internal regulator v l output all converters off, v in > 5.5, 0 < i l < 30 ma 4.7 5.5 v v l fault lockout voltage 3.6 4.2 v l fault lockout hysteresis 75 mv v l /fb5 switchover voltage 4.2 4.7 v v l /fb5 switchover hysteresis 75 mv
document number: 70818 s11-0975-rev. d, 16-may-11 www.vishay.com 3 vishay siliconix si9136 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 notes: a. the algebraic convention whereby the most negative value is a minimu m and the most positive a maximum. b. typical values are for design aid only, not guaranteed nor subject to production testing. pin configuration specifications parameter specific test conditions v in = 15 v , i vl = i ref = 0 ma t a = 0 c to 90 c, all converters on limits unit min. a typ. b max. a reference ref output no external load 3.24 3.30 3.36 v ref load regulation 0 to 1 ma 30 75 mv supply current supply current-shutdown all converters off, no load 35 60 a supply current-operation all converters on, no load, f ocs = 200 khz 1100 1800 oscillator oscillator frequency 180 200 220 khz maximum duty cycle 92 95 % outputs gate driver sink/source current (buck) dl3, dh3, dl5, dh5 forced to 2 v 1 a gate driver on-resistance (buck) high or low 2 7 ? gate driver sink/source current (flyback) dhfy, dlfy forced to 2 v 0.2 a gate driver on-resistance (flyback) high or low 15 ? 5 on/off , 3 on/off , and 12 on/off v il 0.8 v v ih 2.4 ssop-28 to p view 25 26 27 28 2 3 4 1 22 23 24 5 6 7 18 19 20 21 9 10 11 8 15 16 17 12 12 14 ordering description part number temperature range v out si9136lg 0 c to 90 c 3.3 v, 5 v, 12 v evaluation board temperature range board type si9136db 0 c to 90 c surface mount
www.vishay.com 4 document number: 70818 s11-0975-rev. d, 16-may-11 vishay siliconix si9136 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 pin description pin number symbol description 1 cs 3 current sense input for 3.3 v buck. 2 fbfy feedback for flyback. 3 bstfy boost capacitor connec tion for flyback converter. 4 dhfy gate-drive output for flyback high-side mosfet. 5 lxfy inductor connection for flyback converter. 6 dlfy gate-drive output for flyback low-side mosfet. 7 csp current sense positive input for flyback converter. 8 csn current sense negative input for flyback converter. 9 gnd analog ground. 10 comp flyback compensation connection, if required. 11 ref 3.3 v internal reference. 12 12 on/off on and off control input fo r 12 v flyback controller. 13 3.3 on/off on and off control input for 3.3 v buck controller. 14 5 on/off on and off control input for 5 v buck controller. 15 cs 5 current sense input for 5 v buck controller. 16 dh5 inductor connection for buck 5 v. 17 lx 5 gate-drive output for 5 v buck high-side mosfet. 18 bst 5 boost capacitor connection for 5 v buck converter. 19 dl5 gate-drive output for 5 v buck low-side mosfet. 20 pgnd power ground. 21 fb 5 feedback for 5 v buck. 22 v l 5 v logic supply voltage for internal circuitry. 23 v in input voltage 24 dl3 gate-drive output for 3.3 v buck low-side mosfet. 25 bst 3 boost capacitor connection for 3.3 v buck converter. 26 lx 3 inductor connection for 3.3 v buck low-side mosfet. 27 dh3 gate-drive output for 3.3 v buck high-side mosfet. 28 fb 3 feedback for 3.3 v buck.
document number: 70818 s11-0975-rev. d, 16-may-11 www.vishay.com 5 vishay siliconix si9136 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical characteristics (25 c, unless otherwise noted) efficiency vs. 3.3 v output current 0.001 50 0.1 80 100 60 70 110 0.01 efficiency (%) current (a) 90 frequency = 200 khz v in = 6 v 15 v 30 v 5 v on, 12 v off efficiency vs. 5.0 v output current 0.001 50 0.1 80 100 60 70 110 0.01 efficiency (%) current (a) 90 frequency = 200 khz v in = 6 v 15 v 30 v 3.3 v off, 12 v off efficiency vs. 12 v output current 0.001 55 0.1 65 85 60 70 1 0.01 efficiency (%) current ( a ) 75 80 frequency = 200 khz 6 v 30 v v in = 15 v 5 v on, 3.3 v off
www.vishay.com 6 document number: 70818 s11-0975-rev. d, 16-may-11 vishay siliconix si9136 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical waveforms 5 v converter (v in = 10 v) 5 v converter (v in = 10 v) 5 v converter (v in = 10 v) pwm loading ch1: v out ch2: load current (1 a/div) psm pwm ch1: v out ch2: load current (1 a/div) ? psm operation ch2: v out ch3: inductor node (l x5) ch4: inductor current (1a/div) 5 v converter (v in = 10 v) 5 v converter (v in = 10 v) 5 v converter (v in = 10 v) pwm unloadin g ch1: v out ch2: load current (1 a/div) pwm ? psm ch1: v out ch2: load current (1 a/div) pwm o p eration ch2: v out ch3: inductor node (l x5) ch4: inductor current (1a/div )
document number: 70818 s11-0975-rev. d, 16-may-11 www.vishay.com 7 vishay siliconix si9136 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 typical waveforms 3 v converter (v in = 10 v) 3 v converter (v in = 10 v) 12 v converter (v in = 10 v) pwm, loading ch1: v out ch2: load current (1 a/div) psm ? pwm v out ch2: load current (1 a/div) ch1: 250 ma transient ch1: v out ch4: load current (100 ma/div) 3 v converter (v in = 10 v) 3 v converter (v in = 10 v) start-up pwm, unloading ch1: v out ch2: load current (1 a/div) pwm ? psm ch1: v out ch2: load current (1 a/div) 3.3 v output 5 v output 12 v output inductor current, 5 v converter (2 a/div)
www.vishay.com 8 document number: 70818 s11-0975-rev. d, 16-may-11 vishay siliconix si9136 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 standard application circuit figure 1. bstfy dhfy lxfy dlfy csp csn fbfy dl5 lx 5 dh5 bst 5 v l comp pgnd fb 5 cs 5 v in bst 3 dh3 lx 3 dl3 cs 3 fb3 5 on/off ref gnd 3.3 on/off 12 on/off v in c7 33 f c1 0.1 f q1 si4416dy c6 330 f + 3.3 v l2 10 h q3 si4812dy r 1 r cs2 0.02 c11 1 f + 3.3 v up to 1 ma cmpd2836 d1 d2 cmpd2836 c2 0.1 f d3 cmpd2836 c8 0.1 f q2 si4416dy q4 si4812dy c4 33 f d5, d1fs4 q5 si2304ds l3, 10 h q6 si2304ds r 6 r cs3 c10 100 f c9 4.7 f d4, d1fs4 + 12 v 0 to 250 ma l1, 10 h r 7 r cs1 0.02 c5 4.7 f + 5 v up to 30 ma c3 330 f + 5 v c12 120 pf
document number: 70818 s11-0975-rev. d, 16-may-11 www.vishay.com 9 vishay siliconix si9136 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 timing diagrams figure 2. converter is enabled before v in is applied on/off v in v l v ref osc en (sysmon en) osc f max (ss) dh d l the converter is enabled v in is applied ldo is activated after v in is applied ref circuit is activated after v l becomes available after v ref goes above 2.4 v, the converter is turned on oscillator is activated slow soft-start gradually increases the maximum inductor current high-side gate drive duty ratio gradually increases to maximum low-side gate drive 4 ms 2.4 v t bbm figure 3. converter is enabled after v in is applied on/off v in v l v ref osc en (sysmon en) osc f max (ss) dh dl the converter is enabled v in is applied ldo is activated after v in is applied ref circuit is activated after v l becomes available after v ref goes above 2.4 v, the converter is turned on oscillator is activated slow soft-start gradually increases the maximum inductor current 2.4 v 4 ms
www.vishay.com 10 document number: 70818 s11-0975-rev. d, 16-may-11 vishay siliconix si9136 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 timing diagrams figure 4. power off sequence v in v l v ref osc f max (ss) d h d l v (v l ) reset 4 v 3.4 v osc en (sysmon en)
document number: 70818 s11-0975-rev. d, 16-may-11 www.vishay.com 11 vishay siliconix si9136 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 detail functional block diagram figure 5. buck block diagram + - + - logic control - + bbm 5/3 on/off _ 1x dh dl lx_ v l dh dl ref pwmcmp pulse skipping control current limit sync rectifier control 20 mv t cs_ fb_ fb 5 internal voltage divider is only used on 5 v output. slc r x r y bst_ error amplifier v soft-start figure 6. pwm flyback block diagram + - + - + - + - t dh dl fbfy r1 r2 dhfy dlfy bsty lxfy pulse skipping control pwm comparator 100 mv ref comp icsn icsp c/s amplifier current limit on/off error amplifier logic control soft-start v
www.vishay.com 12 document number: 70818 s11-0975-rev. d, 16-may-11 vishay siliconix si9136 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 detail functional block diagram description of operation start-up sequence si9136?s outputs are controlled by three specific input control lines; 3.3 on/off , 5 on/off , and 12 on/off . once v in is applied, the v l , the 5 v ldo will come up within its tolerance. when any one of these control lines becomes logic high, the precision 3.3 v reference will also come up. immediately afterwards, the oscillator will begin and the corresponding converter will come up with its own tolerance. in the event of all three converters are turned off, the oscillator and the reference output will be turned off, an d the total system will only draw 35 a of supply current. each converter can soft-start independently. this internal soft-start circuitry for each c onverter will gradually increases the inductor maximum peak current during the soft-start period (approximately 4 ms), preventing excessive currents from being drawn from the input. si9136 converts a 5.5 v to 30 v input voltage to five different output voltages; two buck (s tep-down) high current, pwm, switch-mode supplies of 3.3 v and 5 v, one "flyback" pwm switch-mode supply of 12 v, one precision 3.3 v reference and one 5 v low drop out (l do) linear regulator output. switch-mode supply output current capabilities depend on external components (can be selected to exceed 10 a). in the standard application circuit illustrated in figure 1, each buck converter is capable of delivering 5 a, with the flyback converter delivering 250 ma. the recommended load currents for the precision 3.3 v reference output is less than 1 ma, and the 5 v ldo output is less than 30 ma. in order to maximize power efficiency of the converter, when the 5 v buck converter output (fb5) voltage is above 4.5 v, the internal 5 v ldo is turned off and v l is supplied by the 5 v converter output. buck converter operation: the 3.3 v and 5 v buck converters are both current-mode pwm and psm (during light load operation) regulators using high-side bootstrap n-channel and low-side n-channel mosfets. at light load conditi ons, the converters switch at a lower frequency than the clock frequency, seen like some clock pulses between the actual switching are skipped, this operating condition is defined as pulse-skipping. the operation of the converter(s) s witching at clock frequency is defined as normal operation. figure 7. complete si9136 block diagram 5 v buck controller fb 5 cs 5 bst 5 dh5 lx 5 dl5 5 v linear regulator 3.3 v reference 4 v 2.4 v 4.5 v 5 on/off 3.3 v buck controller fb 3 cs 3 bst 3 dh3 lx 3 dl3 3 on/off 12 v flyback controller fybfy icsp icsn bstfy dhfy lxfy 12 on/off dlfy v in v l logic control
document number: 70818 s11-0975-rev. d, 16-may-11 www.vishay.com 13 vishay siliconix si9136 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 description of operation (cont?d) normal operation: buck converters in normal operation, the buck converter high-side mosfet is turned on with a delay (known as break-before-make time - t bbm ), after the rising edge of the clock. after a certain on time, the high-side mosfet is turned off and then after a delay (t bbm ), the low-side mosfet is turned on until the next rising edge of the clock, or the inductor current reaches zero. the t bbm (approximately 25 ns to 60 ns), has been optimized to guarantee the efficiency is not adversely affected at the high switching frequency and a specified minimum to account for variations of possible mosfet gate capacitances. during the normal operation, the high-side mosfet switch on-time is controlled internally to provide excellent line and load regulation over temperature. both buck converters should have load, line, regulation to within 0.5 % tolerance. pulse skipping: buck converters when the buck converter switching frequency is less than the internal clock frequency, its operation mode is defined as pulse skipping mode. during this mode, the high-side mosfet is turned on until v cs -v fb reaches 20 mv, or the on time reaches its maximum du ty ratio. after the high-side mosfet is turned off, the lo w-side mosfet is turned on after the t bbm delay, which will remain on until the inductor current reaches zero. the output voltage will rise slightly above the regulation voltage after this sequence, causing the controller to stay idle for the next one, or several clock cycles. when the output voltage falls slightly below the regulation level, the high-side mosfet will be turned on again at the next clock cycle. wi th the converter remaining idle during some clock cycles, the switching losses are reduced in order to preserve conversion efficiency during the light output current condition. current limit: buck converters when the buck converter inductor current is too high, the voltage across pin cs3(5) and pin fb3(5) exceeds approximately 120 mv, the high-side mosfet would be turned off instantaneously regardless of the input, or output condition. the si91 36 features clock cycle by clock cycle current limiting capability. flyback converter operation: designed mainly for pcmcia or eeprom programming, the si9136 has a 12 v output non-isolated buck boost converter, called for brevity a flyback. i t consists of two n-channel mosfet switches that are turned on and off in phase, and two diodes. similar to the buck converter, during the light load conditions, the flyback converter will switch at a frequency lower than the internal clock frequency, which can be defined as pulse skipping mode (psm); otherwise, it is operating in normal pwm mode. normal operation: flyback converter in normal operation mode, the two mosfets are turned on at the rising edge of the clock, and then turned off. the on time is controlled internally to provide excellent load, line, and temperature regulation. the flyback converter has load, line and temperature regulation well within 0.5 %. pulse skipping: flyback converter under the light load conditions, similar to the buck converter, the flyback converter will enter pulse skipping mode. the mosfets will be turned on until the inductor current increases to such a level that the voltage across the pin csp and pin csn reaches 100 mv, or the on time reaches the maximum duty cycle. after the mo sfets are turned off, the inductor current will conduct through two diodes until it reaches zero. at this point, the flyback converter output will rise slightly above the regulation level, and the converter will stay idle for one or several clock cycle(s) until the output falls back slightly below the regulation level. the switching losses are reduced by skipping pulses and so the efficiency during light load is preserved. current limit: flyback converter similar to the buck converter; when the voltage across pin csp and pin csn exceeds 410 mv typical, the two mosfets will be turned off regardless of the input and output conditions. flyback lowside drive unlike the gate drive for the two buck converters, the flyback lowside gate drive dlfy is pow ered by a voltage that can be as high as 15 v with 20 v input for the flyback converter. if this poses concerns on the mosfet v gs rating, a simple resistor-zener circuit can be used : a resistor series with gate and zener diode across the gate and source to clamp its voltage. a 100 ? , 10 v combination works well.
www.vishay.com 14 document number: 70818 s11-0975-rev. d, 16-may-11 vishay siliconix si9136 this document is subject to change without notice. the products described herein and this document ar e subject to specific disclaimers, set forth at www.vishay.com/doc?91000 description of operation (cont?d) grounding: there are two separate grounds on the si9136, analog signal ground (gnd) and power ground (pgnd). the purpose of two separate grounds is to prevent the high currents on the power devices (both external and internal) from interfering with the analog signals. the internal components of si9136 have their grounds tied (internally) together. these two grounds are then tied together (externally) at a single point, to ensure si9136 noise immunity. this separation of grounds should be maintained in the external circuitry, with the power ground of all power devices being returned directly to the input capacitors, and the small signal ground being returned to the gnd pin of si9136. on/off function logic-low shuts off the appropriate section by disabling the gate drive stage. high-side and low-side gate drivers are turned off when on/off pins are logic-low. logic-high enables the dh and dl pins. stability: buck converters: in order to simplify designs, the si9136 requires no specified external components except load capacitors for stability control. meanwhile, it achieves excellent regulation and efficiency. the converters are current mode control, with a bandwidth substantially higher than the lc tank dominant pole frequency of the output filter. to ensure stability, the minimum capacitance and maximum esr values are: where v ref = 3.3 v, v out is the output voltage (5 v or 3.3 v), rcs is the current sensing resistor in ohms and bw = 50 khz with the components specified in the application circuit (l = 10 h, rcs = 0.02 ? , c out = 330 f, esr approximately 0.1 ? , the converter should have a bandwidth at approximately 50 khz, with minimum phase margin of 65, and dc gain above 50 db. other outputs the si9136 also provides a 3.3 v reference which can be external loaded up to 1 ma, as well as, a 5 v ldo output which can be loaded 30 ma, or even more depending on the system application. when the 5 v buck co nverter is turned on, the 5 v ldo output is shor ted with the 5 v buck converter output, so its loading capability is substantially increased. for stability, the 3.3 v refere nce output requires a 1 f capacitor, and 5 v ldo output requires a 4.7 f capacitor. vishay siliconix maintains worldwide manufacturing capability. products may be manufactured at one of several qualified locatio ns. reliability data for silicon technology and package reliability represent a composite of all qualified locations. for related documents such as package/tape drawings, part marking, and reliability data, see www.vishay.com/ppg?70818 . c load v ref 2 xxr cs xbw esr v out x rcs v ref v out
l 1 ? c ? a 1 0.076 28 15 1 ? b ? e c l m s 0.12 a b c 14 e 1 e ? a ? b seating plane seating plane gauge plane 0.25 r c d a 2 a package information vishay siliconix document number: 72810 28-jan-04 www.vishay.com 1 ssop: 28-lead (5.3 mm) (power ic only) millimeters dim min nom max a 1.73 1.88 1.99 a 1 0.05 0.13 0.21 a 2 1.68 1.75 1.78 b 0.25 0.30 0.38 c 0.09 0.15 0.20 d 10.07 10.20 10.33 e 7.60 7.80 8.00 e 1 5.20 5.30 5.40 e 0.65 bsc l 0.63 0.75 0.95 l 1 1.25 bsc r 0.09 0.15 ? ? ? 0 4 8 ecn: s-40080?rev. a, 02-feb-04 dwg: 5915
document number: 91 000 www.vishay.com revision: 11-mar-11 1 disclaimer legal disclaimer notice vishay all product, product specifications and data ar e subject to change without notice to improve reliability, function or design or otherwise. vishay intertechnology, inc., its affiliates, agents, and employees, and all persons acting on its or their behalf (collectivel y, vishay), disclaim any and all liability fo r any errors, inaccuracies or incompleteness contained in any datasheet or in any o ther disclosure relating to any product. vishay makes no warranty, representation or guarantee regarding the suitability of the products for any particular purpose or the continuing production of any product. to the maximum extent permitted by applicab le law, vishay disc laims (i) any and all liability arising out of the application or use of any product, (ii) any and all liability, incl uding without limitation specia l, consequential or incidental dama ges, and (iii) any and all impl ied warranties, including warran ties of fitness for particular purpose, non-infringement and merchantability. statements regarding the suitability of pro ducts for certain types of applications are based on vishays knowledge of typical requirements that are often placed on vishay products in gene ric applications. such statements are not binding statements about the suitability of products for a partic ular application. it is the customers responsibility to validate that a particu lar product with the properties described in th e product specification is su itable for use in a particul ar application. parameters provided in datasheets an d/or specifications may vary in different applications and perfo rmance may vary over time. all operating parameters, including typical pa rameters, must be validated for each customer application by the customers technical experts. product specifications do not expand or otherwise modify vishays term s and conditions of purchase, including but not limited to the warranty expressed therein. except as expressly indicated in writing, vishay products are not designed for use in medical, life-saving, or life-sustaining applications or for any other application in which the failure of the vishay product co uld result in person al injury or death. customers using or selling vishay products not expressly indicated for use in such applications do so at their own risk and agr ee to fully indemnify and hold vishay and it s distributors harmless from and against an y and all claims, liabilities, expenses and damages arising or resulting in connection with such use or sale, including attorneys fees, even if such claim alleges that vis hay or its distributor was negligent regarding the design or manufact ure of the part. please contact authorized vishay personnel t o obtain written terms and conditions regarding products designed fo r such applications. no license, express or implied, by estoppel or otherwise, to any intelle ctual property rights is gran ted by this document or by any conduct of vishay. product names and markings noted herein may be trademarks of their respective owners.

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